1. Field of the Invention
The present invention relates to an apparatus for converting a digital signal to an analog signal, and more particularly, a digital to analog converter.
2. Background of the Related Art
Digital-to-analog (D/A) converters are used to convert digital data to an analog equivalent. Such D/A converters are used in various types of equipment, including digital computers, data processing systems, process control equipment, measuring instruments, communication equipment and a wide variety of other equipment. For example, a D/A converter for a video board of a personal computer (PC) will convert digital video data generated by the PC into analog signals which can drive a video display. Since modern color video displays can display hundreds or even thousands of hues and intensities, it is important that the D/A conversion be very accurate to avoid errors in the displayed image.
As digital computers and data processing equipments have become widespread throughout industry and have even become common in the home, there is a need for an inexpensive, simple and reliable apparatus for converting information between digital and analog forms. A considerable effort has been devoted over a period of time to provide a D/A converter which is simple, inexpensive and reliable.
U.S. Pat. Nos. 4,904,922 to Colles, 5,070,331 to Hisano, 5,293,166 to Ta and 5,406,285 to Diffenderfer illustrate various types of a D/A converter. As shown in FIG. 1, a prior art D/A converter 1 generally includes a decoder 2, an array 4 of current cells 6, and a bias generator 8. The current cells 6 of the array 4 are connected in parallel, and each of the cell includes a current source 5. The digital data from a data bus 9 is applied to the decoder 2, which selectively activates one or more current cells 6 to produce a cumulative current, corresponding the digital data on the data bus 9, on an analog output line 7. The bias generator 8 produces a bias voltage on bias line 3 which controls the current source of each current cell 6.
There is a need for a D/A converter to be monotonic with a relatively high differential and integral non-linearities. "Monotonic" means that digital information of progressively increasing value is converted to analog information of progressively increasing value without any decrease in the analog value as the digital value progressively increases. Integral non-linearities result from errors produced in a conversion between analog and digital values over a wide range of such values. Differential non-linearities result from errors produced in a conversion between analog and digital values over a relatively narrow range of such values. To achieve such a D/A converter, the related art D/A converters may be quite expensive and complex.
For example, the number n of cells 6 in the array 4 is related to the number of bits b on data bus 9 by the relationship n=2.sup.b. If the data bus 9 is 4 bits wide to represent a digital value from 0-15, there will be n=2.sup.4 =16 current cells to produce a analog current value corresponding to any of the digital values. If the data bus has a digital binary value of "0100", corresponding to a decimal value of "4", four of the cells 16 in the array is activated to generate a cumulative current corresponding to the digital binary value, i.e., the number of current cells activated at any one time corresponds to the numeric value of the datum on the data bus 9. The cumulative current corresponds to the analog value.
As described above, modern color video displays can display hundreds or even thousands of hues and intensities. In order to generate numerous hues and intensities for a color video displays, which presently uses analog signals, the number of cells 6 in the array needs to increase with the increase in digital values. For example, in order to generate analog values corresponding to 512 digital values, i.e., 0-511, the data bus 9 increases to 9 bits. To be monotonic, the number of cells 6 in the array increases to n=2.sup.9 =512 cells.
Such increase in cells result in increase of the device count and real-estate usage of the D/A converter. Further, more pheriperal devices are needed to accomodate the increase in the number of cells. Moreover, such large number of cells tend to slow the operational speed of the the D/A converter, which is unacceptable for devices which may operate at high frequencies of, e.g., 100 MHz or more.
Further, the bias generator 8 is sensitive to a voltage variation .DELTA.V of the source voltage Vdd, and is also sensitive to noise present in the substrate. Such voltage variation and noise deteriorate the PSRR (Power Supply Rejection Ratio), resulting in high linearity error to affect the accuracy of the D/A converter. The accuracy of the D/A converter is further aggravated with the increase in the device count of the current cells. As shown, the bias generator 8 provides a reference voltage Vref to the current cells. Due the the voltage variation .DELTA.V of the source voltage Vdd, a constant reference voltage Vref is not generated by the bias generator 8, resulting in an error current I.sub.e to be generated by each current cell 6. Since the outputs of all of the current cells 16 are coupled together in parallel, this will result in a cumulative error current I.sub.E =e2.sup.b, which can be substantial as the number of current cells increases with the increase in the number of bits on the data bus 9 for increasing the digital values.
There is difficulty in providing a D/A converter which provides a monotonic output, with minimal integral and differential errors, even while operating at relatively high frequencies. Further, there is a difficulty to provide a D/A converter with relatively low device count and real-estate usage. Moreover, it is difficult to provide an accurate D/A converter which is non-expensive and non-complex.
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.